18年专注短距无线通信模组
WiFi、蓝牙、Zigbee模块
业务咨询热线
Wifi模块
规格
产品特点
■ 支持Linux/Android操作系统
■ 支持Soft AP
■ 符合CE/FCC/SRRC电磁兼容法规
■ 遵循RoHs/REACH环保指令
■ 邮票孔封装，易于SMT制程
■ 适用于：IPC、投影仪、智能电视、机顶盒、行车记录仪
模块尺寸图
模块引脚
| Pin | Name | Description |
| 1 3-8 10 11 13 23 32 39 46 48 | GND |
Ground connections
|
| 2 |
ANT1
|
RF I/O port chain0, dual band Wi-Fi
|
| 9 |
ANT2
|
RF I/O port chain0, dual band Wi-Fi
|
| 12 |
ANT3 (RF_BT)
|
Reserved for BT RF I/O port, used only by the 3rd
antenna functionary
|
| 14 | G_BT |
GPIO5. G_BT
If not used keep NC.
Do not connect to GND.
|
| 15 |
SD_RESET
|
Reset Pin for SDIO interface
ON: pull high; OFF: pull low
Low for disable SDIO interface
|
| 16 |
WL_WAKE_HOST
|
GPIO10.
WLAN to wake-up HOST
|
| 17 |
SDIO_CMD
|
SDIO command line
|
| 18 |
SDIO_ CLK
|
SDIO clock line
|
| 19 |
SDIO_DATA3
|
SDIO data line 3
|
| 20 |
SDIO_DATA2
|
SDIO data line 2
|
| 21 |
SDIO_DATA0
|
SDIO Data line 0 |
| 22 |
SDIO_DATA1
|
SDIO data line 1
|
| 24 25 26 |
NC
|
No connect
|
| 27 | PCM_SYNC |
PCM sync signal
|
| 28 | PCM_IN |
PCM data input
|
| 29 | PCM_OUT |
PCM Data output
|
| 30 | PCM_CLK |
PCM clock
|
| 31 | SUSCLK |
External Low Power Clock input (32.768KHz)
If not used keep NC
|
| 33 |
NC
|
No connect
|
| 34 |
VDDIO
|
I/O Voltage supply input 1.8V or 3.3V
|
| 35 |
NC
|
No connect
|
| 36 |
VCC33
|
Main power voltage source input 3.3V
|
| 37 |
NC
|
No connect
|
| 38 |
BT_DIS_N
|
Enable pin for Bluetooth device
ON: pull high; OFF: pull low
External pull low to shut down BT
|
| 40 |
UART_TXD
|
Bluetooth UART interface
|
| 41 |
UART_RXD
|
Bluetooth UART interface
|
| 42 |
UART_RTS
|
Bluetooth UART interface
|
| 43 |
UART_CTS
|
Bluetooth UART interface
|
| 44 |
WL_DIS_N
|
Enable pin for WLAN Radio
ON: pull high; OFF: pull low
External pull low to disable WLAN Radio
|
| 45 |
G_WL
|
GPIO4, G_WL
If not used keep NC.
Do not pull high on this pin.
|
| 47 |
NC
|
No connect
|
| 49 |
HOST_WAKE_BT
|
HOST wake-up Bluetooth device
|
| 50 |
BT_WAKE_HOST
|
Bluetooth device to wake-up HOST
|
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